Summary of Alternate Test of RF Front Ends with IP Constraints: Frequency Domain Test Generation and Validation

Alternate Test of RF Front Ends with IP Constraints: Frequency Domain Test Generation and Validation is a paper from the 2006 IEEE International Test Conference and I read it.

The authors are: Akbay, Torres, Rumer, Chatterjee and Amtsfield

Before I begin I would like to extend my apologies to the authors of this paper if I completely mangle their work in my summary of it.

Summary

In this paper the authors explain the work they have done on “alternate test.” The idea behind alternate test is to take a number of individual tests and combine them into one test. Specifically, multiple separate input signals are combined in to a single input signal to, essentially, take multiple specified measurements at once.

This reminds me of a test I worked on once where I wanted to apply a sine wave to a circuit at three different frequencies and look at the amplitude of the output signal. Well, instead of applying three separate sine wave inputs sequentially, I created a single input signal that was the sum of the three sine waves. The output amplitude could then be measured by performing the FFT and looking at the three frequencies of interest.

The main advantages of alternate test are shortened test times and less expensive test equipment.

The authors say the primary difference of this paper compared to previous work is that they are working on a method of alternate test that does not require input into the chip design by the test engineer and details of the chip design are not available due to IP blocks being used. That is the test engineers do not have the semiconductor device models, process variation and low-level netlist information available and these things are not required.

If I understand correctly, they are building a high-level Matlab simulation model of a chip using a combination of information from the datasheet and physical measurement results. The input is then simulated and the results are mapped back to which specifications they correspond, with a statistical process. This result is then compared to the actual set of measurements and specification checking for accuracy. This whole process is run repeatedly through and optimization algorithm. Apparently, this is typically done with a greedy algorithm but they have developed a genetic algorithm which is more capable of finding an optimal solution and less dependent on the initial inputs.

Results

These alternate test methods were tested on population of a purchased RF amplifier IC. The test was first implemented on a bench top system and then on an ATE system. The authors say the alternate test method was an order of magnitude faster than testing each of the specifications individually. This was mostly due to the reduction of slow GPIB commands to instrumentation. The cost of the equipment to execute the alternate test was 60% less than the standard test. These comparisons were for the bench-top versions. On an ATE system the alternate test cost 48% less and was 36% faster. The authors also show that the results obtained with the alternate test are as accurate as the original specification tests.

My Takeaway

I was not familiar with the concept of alternate test although it seems like it makes sense.  It seems like this is a fairly complex process and would be difficult to implement. This was interesting.